A conventional method of producing a flip-chip light emitting diode element, involves depositing a plurality of epitaxial semiconductor layers on a sapphire substrate to produce an epitaxial semiconductor structure on a wafer. From the epitaxial layers, a plurality of light emitting diode elements is produced. The wafer is cut to produce an element die. Flip-chip techniques are used to connect the element die to a fixing plate. The flip-chip connecting process comprises fixing the element die at the fixing plate by connecting at least one electrode of the element die to at least one pad of the fixing plate.
Currently, there is a thin-film based light emitting diode (LED) element to replace the flip-chip light emitting diode element. In comparison to the flip-chip light emitting diode element, a thin-film GaN light emitting diode element has the advantages of low heat resistance, uniform current in the n-type layer and the p-type layer, and low cost. In a thin-film light emitting diode element, the epitaxial wafer is directly bonded to a conductive carrier substrate. Through a laser lift-off process, a GaN layer is decomposed through the use of an excimer laser, permitting removal of the sapphire substrate while maintaining an active region.
The above-described laser lift-off method of removing sapphire substrate is disclosed in U.S. Pat. Nos. 6,455,340, 7,001,824 and 7,015,117. The current laser lift-off approach for making GaN light emitting diodes is incompatible with conventional semiconductor processes as it involves the use of expensive laser equipment and also causes damage to the remaining semiconductor layers such as cracking.
If the laser lift-off process is replaced by a polishing process, such as chemical mechanical polishing (CMP), significant cost savings can be realized. Moreover, polishing is a milder method resulting in less damage than laser lift-off. However, when using CMP, if a plane to be polished is too large, unevenness between sides and center positions of the plane will also be too large. Therefore, the required standard of a flat plane during mass production of semiconductor devices cannot be achieved, lowering the device production yield. Thus, there is a need in the art for a method of substrate removal that is susceptible to mass production at a low cost with high device yield.